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Offset
0x00C
Reset
Access
Name
Bit Position
Bit
Name
Reset
Access
Description
31:24
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
23:18
FCTOP
0x00
RW
Frame Counter Top Value
These bits contain the Top Value for the Frame Counter: CLK EVENT = CLK FC / (1 + FCTOP[5:0]).
17:16
FCPRESC
0x0
RW
Frame Counter Prescaler
These bits controls the prescaling value for the Frame Counter input clock.
Value
0
1
2
3
Mode
DIV1
DIV2
DIV4
DIV8
Description
CLK FC = CLK FRAME / 1
CLK FC = CLK FRAME / 2
CLK FC = CLK FRAME / 4
CLK FC = CLK FRAME / 8
15:9
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
8
FCEN
0
RW
Frame Counter Enable
When this bit is set, the frame counter is enabled.
7
ALOGSEL
0
RW
Animate Logic Function Select
When this bit is set, the animation registers are AND'ed together. When this bit is cleared, the animation registers are OR'ed together.
Value
0
1
Mode
AND
OR
Description
AREGA and AREGB AND'ed
AREGA and AREGB OR'ed
6:5
AREGBSC
0x0
RW
Animate Register B Shift Control
These bits controls the shift operation that is performed on Animation register B.
Value
0
1
2
Mode
NOSHIFT
SHIFTLEFT
SHIFTRIGHT
Description
No Shift operation on Animation Register B
Animation Register B is shifted left
Animation Register B is shifted right
4:3
AREGASC
0x0
RW
Animate Register A Shift Control
These bits controls the shift operation that is performed on Animation register A.
Value
0
1
2
Mode
NOSHIFT
SHIFTLEFT
SHIFTRIGHT
Description
No Shift operation on Animation Register A
Animation Register A is shifted left
Animation Register A is shifted right
2
AEN
0
RW
Animation Enable
When this bit is set, the animate function is enabled.
1
BLANK
0
RW
Blank Display
When this bit is set, all segment output waveforms are configured to blank the LCD display. The Segment Data Registers are not
affected when writing this bit.
Value
0
1
Description
Display is not "blanked"
Display is "blanked"
2011-04-12 - d0001_Rev1.10
438
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